Dot Product
Easy · Sequential · SystemVerilog · VHDL
Implement a module that produces the dot product (scalar product) of two length-3 vectors, A = [a_1, a_2, a_3] and B = [b_1, b_2, b_3]. The module has one port din for entering the input sequence and two outputs, run and dout, which return the computation status and dot product.
Assume inputs arrive in the following order: a_1, a_2, a_3, b_1, b_2, b_3. Once the sixth number has been registered, run is asserted and dout returns the dot product. In subsequent cycles, run is de-asserted while dout holds its previous valid value until the next six inputs are captured.
On reset, run is asserted for one cycle and dout is zeroed.