Modular Exponentiation
Hard · Combinational · SystemVerilog
Write a Verilog module that computes modular exponentiation $y = a^b \mod m$, where {a}, {b}, and {m} are unsigned 4-bit integers and {y} is an unsigned 4-bit integer.
Hard · Combinational · SystemVerilog
Write a Verilog module that computes modular exponentiation $y = a^b \mod m$, where {a}, {b}, and {m} are unsigned 4-bit integers and {y} is an unsigned 4-bit integer.